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High performance silicon N-channel gate-all-around junctionless field effect transistors by strain technology
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High performance silicon N-channel gate-all-around junctionless field effect transistors by strain technology

P.-J. Sung, T.-C. Cho, P.-C. Chen, F.-J. Hou, C.-H. Lai, Y.-J. Lee, Y. Li, S. Samukawa, T.-S. Chao, W.-F. Wu, …
16th International Conference on Nanotechnology - IEEE NANO 2016, 頁碼.174-175
2016
DOI: https://doi.org/10.1109/NANO.2016.7751473

摘要

Leakage currents Nanotechnology Silicon nitride Tensile strain Channel widths Drive currents Gate control N-channel Strain effect Field effect transistors
In this paper, strain effects on silicon n-channel gate-all-around (GAA) jucntionless field effect transistor (JLFET) are studied. By using tensile strain SiN layer, drive currents of the JLFETs show enhancement of up to 42%. The high performance strained JLFETs exhibit superior gate control (Ion/Ioff >109) and ideal S.S. (65 mV/dec.) as a channel width scales down to 20 nm. Drive currents and leakage currents are improved simultaneously after inducing strain technology. © 2016 IEEE.

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https://www.scopus.com/inward/record.uri?eid=2-s2.0-85006931140&doi=10.1109%2fNANO.2016.7751473&partnerID=40&md5=667c09ef756c8e4ef6a6f9fc21ddaa90檢視

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