摘要
In the physical design flow, detailed placement is critical for wirelength optimization and routability enhancement. While many CPU-based approaches emphasize wirelength reduction, GPU-based approaches primarily focus on accelerating detailed placement without sacrificing quality. However, leveraging GPU parallelism to further improve placement quality remains largely underexplored. As existing optimization steps have approached the practical limits of wirelength optimization, achieving further improvements has become increasingly challenging. In this work, we propose a GPU-based detailed placement flow featuring Simultaneous Row and Order Assignment (SROA) step, a novel step that integrates dynamic programming-based row assignment with heuristic-based cell position adjustment. SROA enables efficient exploration of a significantly larger solution space on GPUs. Experimental results show that our approach preserves routability while reducing detailed routing wirelength and via count by 1.35% and 1.03%, respectively, compared to the ABCDPlace solutions.