摘要
To overcome bandwidth demands and Moore's law limitations, advanced packaging strategies integrated with Chiplet architectures and co-packaged optics are developed for high-performance computing or AI applications. Glass substrates are utilized for their low dielectric loss and high thermal stability, yet bottlenecks are faced in Through Glass Via (TGV) manufacturing. Physical failures, including glass cracks, metal delamination and void formation, are suffered by non-uniform or defective sidewalls before copper plating, but no suitable quantification methodology is found. In this study, a hybrid methodology combining photoelasticity and Finite Element Analysis (FEA) is established to estimate residual stress. The optical approach is validated by a disk compression test, where a 99.91% agreement with theory is obtained. FEA stress results are observed to be 1.07-1.13 times those of photoelasticity. Through this hybrid model, a quantifiable framework is provided, and FEA is confirmed as suitable for analyzing TGV structures under mechanical and thermal effects. © 2026 Japan Institute of Electronics Packaging.