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Special Session: Overcoming Transient Faults and Aging Effects in Digital Computing-in-Memory Architectures: Detection, Tolerance, and Mitigation Strategies
會議論文集

Special Session: Overcoming Transient Faults and Aging Effects in Digital Computing-in-Memory Architectures: Detection, Tolerance, and Mitigation Strategies

Yu-Guang Chen 和 Ting-Yi Wu
Proceedings of the ... IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (Online), 頁碼.1-6
08/10/2024
Web of Science ID: WOS:001448004400009

摘要

Adders Aging circuit aging Circuit faults Computing-in-memory Integrated circuit reliability Monitoring Nanotechnology Prevention and mitigation Transient analysis transient fault Tutorials Very large scale integration
Digital computing-in-memory (DCIM) is a promising solution to the von Neumann bottleneck. By utilizing bit-multiplication memory (BMM) cells and adder trees., DCIM efficiently performs MAC operations. However., both BMM cells and adder trees are susceptible to reliability issues., such as transient faults and aging effects. Transient faults can cause single-event upsets (SEUs)., leading to data loss., while aging can degrade circuit performance over time., potentially resulting in functional errors. These reliability threats can impact the accuracy of MAC computation results. In this tutorial., we aim to comprehensively investigate the influence of transient faults and aging effects on DCIM. Additionally., we will explore detection., tolerance., and mitigation strategies to enhance the reliability of DCIM.

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