Abstract
A charge-biased CMOS-MEMS resonant gate field effect transistor (RGFET) composed of a metal/oxide composite resonant-gate structure and an FET transducer has been demonstrated utilizing the TSMC 0.35 μm CMOS technology. As compared to the conventional capacitive-type MEMS resonators, the proposed CMOS-MEMS RGFET features an inherent transconductance gain (gm) offered by the FET transduction capable of enhancing the motional signal of the resonator and relaxing the impedance mismatch issue to its succeeding electronics or 50 Ω-based test facilities. In this work, we design a clamped-clamped beam (CC-beam) resonant-gate structure right above a floating gate FET transducer as a high-Q building block through a maskless post-CMOS process to combine merits from the large capacitive transduction areas of the wide-width beam resonator and the high gain of the underneath FET. An analytical model is also provided to simulate the behavior of the charge-biased RGFET. Thanks to the deep-submicron gap spacing enabled by the post-CMOS polysilicon release process, the proposed resonator under a purely capacitive transduction already attains the motional impedance less than 10 kΩ. To further improve the performance of RGFET, the arrayed RGFET is proposed. A CMOS-MEMS arrayed RGFET fabricated by a standard 0.35 μm CMOS-MEMS platform is implemented to enable a Pierce-type oscillator. The proposed arrayed RGFET exhibits low motional impedance of only 5 kΩ and decent power handling capability. With such features, the implemented oscillator shows impressive phase noise of -117 dBc/Hz at the far-from-carrier offset (1 MHz). In this work, we design a clamped-clamped beam (CCB) arrayed resonator utilizing a high-velocity mechanical coupling scheme to serve as the resonant-gate array. To understand the behavior of the proposed arrayed device, an equivalent circuit model consisting of the resonant unit and FET is also provided. To verify the effects of the post-CMOS process on device performance, a conventional MOS ID current measurement is carried out. Finally, a CMOS-MEMS arrayed RGFET oscillator is realized by utilizing a Pierce oscillator architecture, showing decent phase noise performance that benefits from the array design to alleviate the nonlinear effect of the resonant gate. In the end, a novel band-to-band tunneling bias scheme is employed for the proposed CMOS-MEMS RGFET without the need of manual switch charging or complicated biasing circuits. With the mechanically coupled array approach and deep submicron gap spacing, the proposed resonator with Q of 1,800 under purely capacitive transduction achieves the record-low motional impedance Rm of 1.1 kΩ among all CMOS-MEMS resonators. By using the FET readout, a CMOS-MEMS arrayed RGFET oscillator is realized through a closed-loop configure uration, demonstrating phase noise performance of -96 dBc/Hz at 1 kHz offset and -122 dBc/Hz at far-from-carrier offset, respectively.