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A High-Parallelism synchronization Technique for Multi-Core Instruction-Set Simulation
Dissertation

A High-Parallelism synchronization Technique for Multi-Core Instruction-Set Simulation

Wu, Meng-Huan
Doctor of Philosophy (PHD), 國立清華大學, 資訊工程學系
2010

Abstract

時間同步 分散式同步 多核心模擬 指令集模擬 Timing Synchronization Distributed Synchronization Multi-Core Simulation Instruction-Set Simulation
As multi-core architecture has become the mainstream, the corresponding multi-core instruction-set simulation (MCISS) is also needed to aid system development. Ideally, we may run a MCISS in parallel to enhance the simulation speed. However, the conventional centralized timing synchronization mechanism would greatly constrain the parallelism of a MCISS so that the simulation speed is bounded. To resolve this issue, we propose a new distributed timing synchroni-zation technique which allows higher parallelism for a high-speed MCISS. By allowing each ISS to schedule with others independently, more ISSs can run in parallel. Furthermore, the proposed distributed technique predicts the possible time of each ISS’s future sync point (i.e., the time point for synchronization). Based on this prediction, the time spent on synchronization is effectively reduced, thereby leading to higher parallelism for better simulation performance of a MCISS. The experimental results show that for the same shared memory based synchronization, our distributed technique improve the simulation performance by 9 to 20 times over the conventional centralized approach as the number of cores increases.

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