Abstract
Abstract The nonvolatile memory characteristics of metal-oxide-semiconductor structures containing Pt nanocrystals in SiO2 gate oxide were studied. In this work, a novel, simple and reliable self-assembly process of Pt nanocrystals formation from the reduction of an ultrathin PtOx layer embedded in SiO2 matrix is developed successfully, which is fully compatible with Si technology nowadays. The self-assembled array of uniformly-dispersed and well-isolated Pt nanocrystals with the high spatial density (~2.16×1012 cm-2) and a narrow size distribution in the range of 2-3 nm was obtained by vacuum annealing at 425 ℃ for 25 min. A large hysteresis loop was found in the capacitance-voltage (C-V) relation indicating this significant memory effect. However, two different charge storage mechanisms were found for the Pt nanocrystals in the devices with different tunnel oxide thickness. One is denoted by the counterclockwise hysteresis resulting from substrate injection for the devices made with a thin tunnel oxide layer of 2.5~5.0 nm thick, and the other is characterized by the clockwise hysteresis attributed to the defect injection from the overlaid sputtered gate oxide for the devices having a tunnel oxide layer of 7.5 nm thick. The two mechanisms, substrate injection and defect injection, coexist at the same time but compete with each other. For tunnel oxide being thick enough (≧ 7.5 nm), the substrate injection would be significantly suppressed, and thus the defect injection becomes dominant. A model of defect injection is proposed to explain the clockwise hysteresis. The relatively stable memory characteristics of Pt nanocrystals resulting from substrate injection were also demonstrated. In Chapter 6, the effects of annealing time on the microstructure and electrical characteristics of the self-assembled Pt nanocrystals in SiO2 matrix are clear and significant. For a long enough annealing time, not only the Pt nanocrystals are well isolated and uniformly dispersed, but also the defects in the sputtered oxide are recovered. The superior charge storage and retention characteristics can be obtained due to the small lateral charge loss and the suppression of defect injection. Moreover, according to the gate-voltage dependence of charge storage and the result of the conductance-voltage (G-V) measurement, the macroscopic single-electron transfer due to the Coulomb blockade effect in the MOS device with embedded Pt nanocrystals is successfully demonstrated at room temperature in this research.