Abstract
We find the higher nitrogen concentration treatment can suppress the NMOSFET device narrow width effect and further improve the NMOSFET TDDB performance. The HfSiON high-k material provides better narrow width effect than HfO2 high-k material, thinner La capping help both the narrow width effect and TDDB performance. The experimental result indicated that the oxygen sources of materials, e.g. form STI oxide, interfacial layer, high-k and La capping, penetrated through high-k film and further oxidized narrower channel width transistor’s Ti metal gate which will increase the narrow device threshold voltage. The simply implantation insertion before SiGe channel step helps the device Vth stability and SRAM VtMM improvements due to suppressing the boron puddle effect in narrow devices. The inserted fluorine implantation step with proper depth, i.e. intermediate between a shallow boron implant and a deeper pre-amorphization end-of-range defect band, helps to stabilize the boron puddle effect, while minimizing puddle by B–F complexes. The NMOSFET and PMOSFET transistor DC performance improved due to lower trap density at the SiO2 interfacial layer/high-k interface and in Si bulk. The enhancement of mobility, reduction of trap density, improvement of device performance and reliability stability can be achieved by enhanced interface trap passivation via twice ultra-high pressure deuterium annealing due to heavy mass effect of deuterium Effect of TiN gate electrode on interface trap density, bias temperature instability and time dependent dielectric breakdown in HfSiON MOSFETs are investigated in this work. In this study, we find that the TiN metal gate electrode thickness plays an important role in determining the final dielectric stability as well as interface quality. Samples with thicker TiN gate electrodes, which prevent oxygen diffusion from the high-k layers toward α-Si electrode, exhibit better interface quality. Experimental data also shows that the levels of oxygen vacancies are expected to be suppressed by thicker TiN gate electrode, which subsequently alleviates damage at the Si/SiO2 interface and improves gate dielectric reliability properties.