Abstract
With the increasing demand on non-volatile memory and MOSFET devices, devices with high performance while maintaining good reliability properties are needed. Also, shrinkage in cell dimension for achieving higher storage and packing density is required. In order to improve the device performance, the utilization of SiGe buried channel is considered most promising for improving performance and lowering the operation voltage, according to the simulations, while stays on the track of device scaling down. Literature reviews on the growth of SiGe buried channel, high-concentration Ge channel and the growth techniques of interfacial layers on Ge substrate are provided. In this dissertation, SiGe buried channel, Si/Ge super-lattice channel and Ge channel have been employed for the application on charge-trapping type flash memory devices. Furthermore, Ge MOS and MOSFET devices with different formation processes of GeO2 interfacial layer are also investigated. With the employment of SiGe buried channel, both programming / erasing speeds of devices can be improved while maintaining the reliability characteristics as compared with Si-channel devices. Furthermore, the enhancement on device performance increases with the increasing Ge content within channel. Hence, in order to achieve high-Ge content channel structure, we proposed a novel Si/Ge super-lattice channel structure. From the material characterization of the as-deposited super-lattice, the super-lattice structure possesses extremely low surface-roughness and high crystal quality which are helpful for device fabrication. As a result, much better performances of devices with the employment of super-lattice channel are observed as compared to those with SiGe buried channel. At the meanwhile, the reliability properties for devices with employing super-lattice channel are kept which perform as well as Si-channel devices. For flash memory devices on Ge substrate, devices with different interfacial layers are investigated. The device performances are significantly improved by using Ge substrate as compared with Si-channel device and the retention characteristics can be kept simultaneously. However, the endurance property for Ge devices is slightly worse than that of Si-channel device. Based on the above experience on fabricating Ge flash memory devices, Ge MOS and MOSFET devices with different formation processes of GeO2 interfacial layer are also investigated in this work. The key challenge of having high performance Ge MOS and MOSFET devices is the formation of high quality stoichiometric GeO2 interfacial layer with ultra-thin thickness. In this work, a low EOT with an acceptable gate leakage current density Ge MOS device can be achieved by using H2O plasma grown GeO2 interfacial layer together with in-situ grown HfON gate dielectric. Furthermore, the oxidation states and thickness of the H2O plasma grown GeO2 interfacial layer are characterized by XPS spectroscopy and HR-TEM, respectively, where the oxidation state is +4 with thickness of around 0.3 nm. It is an important achievement in this work. At the meantime, Ge p-MOSFET devices with high hole mobility are obtained by using the high quality GeO2 interfacial layer grown by H2O plasma process. Furthermore, the effects of various detailed growth-conditions within the H2O plasma process on electrical characteristics of Ge MOS devices are also investigated. A high composition of stoichiometric GeO2 interfacial layer with ultra-thin thickness are achieved which result in ultra-low EOT and high reliability properties of the Ge MOS devices.