Abstract
In the first chapter of this thesis, a brief introduction on asteroid type magnetic random access memory (MRAM) is presented followed by the exhibition of the magnetic characteristics of magnetic tunneling junction (MTJ) device. Several issues for MRAM technology are highlighted. In the second chapter of this thesis, a novel MRAM cell with pillar write word line (PWWL) is proposed and integrates effortlessly with the complementary metal oxide semiconductor (CMOS) process. Asides from the magnetic field induced by the bottom write word line (WWL), an additional magnetic field is superimposed into the memory cell from the current flowing through the pair of PWWLs. This structure can significantly enhance the magnetic field and can thus reduce the writing current by approximately a factor of 2 as compared to the conventional structure. The field enhancement will be even more pronounced as the MRAM cell is further downsized. Following that, a novel cell structure based on one transistor and two uneven magnetic tunnel junctions (1T2UMTJ) is proposed to shrink the bit size with a potential decrease in size down to 6 F2 by using a so-called extended via (ExtVia) process. Consequently, a high reading speed and throughput of less than 50 ns accessing time for two sharing bits is realized. In addition, numerous reference generators are discussed and compared. Two kinds of inherent mid-value cells for asteroid MRAM and toggle MRAM are proposed, which can not only be used for the robust and reliable reference cell but also as a potential data-storage memory cell. In the third chapter of this thesis, novel writing schemes with preceding single negative pulse (SNP) waveform and double negative pulse (DNP) waveform for toggle MRAM are proposed and studied to enhance the switching yield and enable a low current switching. The failure mechanism of toggle switching is studied by micromagnetic analysis. Both simulation results and measured data show that the toggle MRAM can be operated in low writing current at strong bias field. As a result of broadened operation window and reduced switching current, the scalability of MRAM is feasible with the robust toggle operation and improved reliability. In the fourth chapter of this thesis, a modified 1T2UMTJ cell structure for toggle MRAM is proposed and discussed. The 1T2UMTJ toggle MRAM has the advantage on bit size and has a double word length. Besides, the 1T2UMTJ toggle MRAM has the potential to operate at a high read/write bandwidth using the proposed input/output circuitry. Consequently, with the reduced bit size and the improved operation performance, the MRAM becomes even more attractive compared with the conventional semiconductor memories. In the fifth chapter of this thesis, two kinds of inherent mid-value cells for MRAM are proposed and studied by the micromagnetic simulation. Since the operation loading on such cells can be balanced, the memory and reference dual-role cell can enhance the chip’s reliability. The micromagnetic analysis and the experimental data shows that a near full magneto-resistance ratio (MR%) sensing margin is achieved by a so-called “orthogonal wiggle” MRAM cell. In addition, a fast read/write operation of MRAM is demonstrated by a MTJ-modeled SPICE simulation for the proposed orthogonal wiggle cell. Moreover, the read functionality and the chip reliability can be enhanced by the proposed adjacent-reference architecture and, particularly, the self-reference architecture. With all the innovative designs, the mass production of MRAM becomes more feasible because of the shrunk bit size, the reduced switching current, the improved performance and, particularly, the enhanced switching accuracy and the stabilized chip functionality and reliability.