Abstract
An accurate and efficient analytical geometric method is presented for predicting the geometric parameters of the Controlled Collapse Chip Connection (C4) type solder joint using Direct Chip Attach (DCA) technology in area array type package after a reflow process. By this method, the meridian of the solder joint is first discretized as a series of sufficiently fine fragmental arcs. After calculating the internal pressure inside the molten eutectic solder from the forces balance, the meridional and circumferential curvature radii of each arc are then obtained from the Laplace-Young equation. As a result, the coordinates of each node of the arc and the solder joint geometry can be determined in turn. The factors that affect the final shape of the molten eutectic solder joints, including the solder volumes, the external loading, the pad size, the surface tension of molten eutectic solder, and the interfacial surface tension between molten eutectic solder and solid high-lead bump are considered herein. Moreover, liquid formation of solder bump constrained by a circular pad, SMD/NSMD solder joint and eutectic solder fillet partially spreading cover the high-lead bump is also conducted. The results computed by the analytical geometric method are also compared with those obtained using the Surface Evolver program, the extended Heinrich’s model, and the experimental results. The results of the various approaches are mutually consistent. As ultra-fine-pitch technologies are adopted to enhance the performance of electronic packaging, solder bridging becomes an urgently serious defect. This work also presents a computational model using the Surface Evolver program to analyze the stability of solder bridging for area array type package. Several factors that affect the stability of solder bridging spanning two identical circular pads are considered herein, including the pad size, the total volume of solder bumps, the pitch between adjacent pads, the contact angle between the molten solder alloy and the pad, the contact angle between the molten solder alloy and the solder mask and the surface tension of the molten solder alloy, respectively. The critical total volume of solder bumps and the critical pitch between adjacent pads are defined as the corresponding critical values to determine the solder bridging from a stable state to an unstable (vanishing) state. The stability of solder bridging spanning three and four identical circular pads is also discussed. Good agreement between the computed critical total volume of solder bumps for solder bridging and that available in the literature exhibits that the model developed in this work can be practically applied to predict the stability of solder bridging. The mechanism of self-alignment for the SMD and C4 type solder joints with misaligned upper/lower pads is analyzed using the Surface Evolver program. The self-aligning motion is then simplified by analogy to the component mass with a spring and a damper. Fundamental dynamic analysis is used to obtain preliminary results, such as natural frequency, damping ratio and alignment time, which is the time taken for the amplitude of self-aligning motion to decay to less than . The factors that affect the mechanism of self-alignment, such as the misalignment between the upper/lower pads, the solder joint height, the pad size, the solder volumes, the external loading and the viscosity and surface tension of molten eutectic solder are all taken into account. The results for a SMD solder joint calculated using the model proposed herein and those available in the literature are in good agreement. This work analyzes the geometric parameters of the solder joints after a reflow process, the stability of the solder bridging and the self-alignment for the solder joints with misaligned upper/lower pads accurately and efficiently. The results provide the influences of various design factors and should be helpful for the electronic packaging design. The proposed approaches can also be applied to other advanced packaging technologies, such as wafer level packaging and optoelectronic device packaging, etc.