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Study of High-Performance and High-Density Flash Memory
Dissertation

Study of High-Performance and High-Density Flash Memory

Ruei-Ling Lin
Doctor of Philosophy (PHD), 國立清華大學, 電機工程學系
1999

Abstract

快閃記憶體 多頁平行編碼 擬動態儲存 多值邏輯 自我收斂 源極控制多值編碼 汲極控制多值編碼 Flash Memory Multiple Page Parallel Program Dynamic Storage Multilevel Storage Self-convergent Source Controlled Multilevel Program Drain Controlled Multilevel Program
Flash EEPROM has been widely used in mobile applications, such as digital camera, cellular phones and music players. The market is rapidly growing along with the new application fields. The major developing trends include fast writing throughput and high-density storage. In the first part of this dissertation, a novel power limited multiple page parallel programming (MPP) technique in the new dynamic buffer architecture is proposed for enhanced programming. The novel power limited MPP utilizes dynamic buffers for continuous loading of programming data and employs dynamic local latching for storing signals. This innovation overcomes the conventional writing-speed limitation of static buffers. The proposed local latching techniques include (a) NAND Dynamic Cell Latching (DCL), (b) DINOR Dynamic Bit-Line Latching (DBL), (c) AND Dynamic Sector Latching (DSL), Boosting Bitline Dynamic Sector Latching (BB-DSL), and Capacitor-Plate Boosting Bitline Dynamic Sector Latching (CBB-DSL). We found that latching devices strongly affect the programming characteristics of Flash memory. A novel two-step sense and refresh algorithm is proposed to control threshold voltages in the dynamic buffer architecture. This algorithm features reduced dynamic buffer sizes, enhanced programming, and capability of controlling threshold voltages. The new approach greatly improves the programming throughput, which is very suitable for future high-speed Flash memory applications. The second part of this dissertation discusses two novel multi-level programming techniques, the Source-Controlled Self-Verified (SCSV) method for N-channel EEPROM and the Self-Adjusted Dynamic Source (SADS) method for P-channel Flash memory. The SCSV method achieves nondegraded multilevels in the proposed high-impedance loaded configuration, extending endurance cycles by the self-verified mechanism. The SADS method introduces a multilevel P-channel hot carrier programming with the new drain-controlled source voltage in the newly developed constant current driven source configuration. Fast and low power multilevel programming is successfully achieved. The two techniques provide promising solutions for future reliable high-density applications.

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