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Study of Low-k Dielectric RC delay time of Cu Dual Damascene Interconnect
Dissertation

Study of Low-k Dielectric RC delay time of Cu Dual Damascene Interconnect

Huang, Cheng-Lin
Doctor of Philosophy (PHD), 國立清華大學, 材料科學工程學系
2012

Abstract

銅導線內連接製程 低介電係數介電材料 銅擴散阻障層 電阻電容時間延遲 Cu Dual Damascene Interconnect Low-k dielectric materials Cu diffusion barrier RC delay time
Abstract This dissertation presents the modeling and characterization of both effective resistivity and effective k reduction of advanced Cu dual damascene interconnects. As the semiconductor integrated circuit continues to shrink, the RC delay of interconnect has become an important issue and has to decrease with the technology scaling. Since copper wire has been implemented to reduce R from 0.13 µm technology node, the major approach to further reduce RC delay is to use low-k and extreme low-k dielectric material for advanced Cu interconnects. However, the reliability of low-k dielectric becomes a serious issue with the technology scaling. Both dielectric material k-scaling and interconnect geometrical size scaling will degrade the interconnect reliability. In this thesis, we investigated both geometrical size dependence of metallization and influence factor of low dielectric constant (k) on the effective resistivity and effective k reduction, respectively. We develop a statistical model to accurately describe effective Cu resistivity distribution as a function of line width scaling and effective k variation as a function of k damage reduction. In addition to the effective Cu resistivity modeling, several kinds of Cu diffusion barrier materials are investigated, including reactively sputtered niobium nitride (NbNx), reactively sputtered titanium zirconium nitride ((Ti,Zr)Nx), atomic layer deposition tantalum nitride (ALD TaN) and self-forming barrier layer by Cu-Mg alloy seed for barrier volume effect. Moreover, the effects of the Cu diffusion barrier materials on the integration issue are studied to evaluate the compatibility of low-k materials on semiconductor process. On the other hand, copper (Cu) surface and interface cleanness is an indispensable requirement in Cu dual-damascene fabrication. Cu can be easily oxidized when exposed to commonly used processing environments at low temperatures (< 200oC), and such oxidation could negatively impact component performance and reliability. Hydrogen-based plasma, such as NH3 and H2, was reported to generate H species to remove the Cu oxide formed on the Cu surface by oxidation-reaction reaction. However, an in-situ plasma educed k damage layer was observed at low-k materials, it can increase the effective interconnect capacitance because its dielectric constant can be increased significantly. Meanwhile, to prevent Cu from oxidation, which induces reliability failure, the plasma Cu oxide (CuxO) reduction is performed before Cu diffusion barrier film deposition. As a result, this integration process control and mechanism of k damage evaluation were investigated in this work as well. Refractory niobium nitride, NbNx, films which were prepared by RF reactive magnetron sputtering from a Nb target in N2/Ar gas mixtures. Based on thermal stability and material characteristics analysis results indicate that the barrier performances are significantly affected by the chemical composition of NbNx films, N/Nb atomic ratio. The diffusion coefficient of Cu in NbNx was measured by four-point probe (FPP) analysis after annealing Cu/NbNx/Si multilayered samples in the temperature range of 600-850°C. Cu diffusion in NbNx had components from both the grain boundaries and the lattice based on diffusion analysis. Reactively sputtered titanium zirconium nitride, (Ti,Zr)Nx, films which were prepared on Si substrates by DC reactive magnetron sputtering from a Ti-5 at% Zr alloy target in N2/Ar gas mixtures. According to thermal stability and material characteristics analysis results, the deposition rate, chemical composition, crystalline structure, and film resistivity of the deposited films correlate with the N2/Ar flow ratio. The microstructure of the (Ti,Zr)Nx films was found to be an assembly of very small columnar crystallites with a rock-salt (NaCl) structure and an enlarged lattice constant (over pure TiN). A minimum film resistivity of 59.3 μΩ-cm was obtained at an N2/Ar flow ratio of 2.75, corresponding to near stoichiometric film composition (N/TiZr ratio ~0.95) and crystalline structure. The activation energy of the Cu diffusion in the temperature range of 500-750°C is less than half of that in the temperature range of 750-850°C, indicating that the diffusion in the (Ti,Zr)Nx barrier is controlled by both gain boundary and lattice diffusion. Besides, our results also suggest that both NbNx and (Ti,Zr)Nx can be used as a superior ultra thin diffusion barrier for Cu metallization as compared to the well-known TaN film Further study the wettability and adhesion of Cu to the barrier substrate in Cu/low-k integration. To investigate the (Ti,Zr)Nx barrier performance of wettability, stress induced voiding (SIV) and electromigration (EM) reliability. This (Ti,Zr)Nx layer simultaneously maximizes adhesion to the inter layer dielectric and Cu fill, and has very low in-plane resistivity (59.3 μΩ-cm) at N/TiZr ratio ~0.95. This barrier produces high-yield, highly reliable and electromigration resistant Cu interconnects. The need for a thinner barrier for copper has risen in order to meet the requirements for future device performance, the effective Cu resistivity especially. The conventional barrier process by Physical Vapor Deposition (PVD) has the limitation to achieve conformal step coverage across the dual damascene structure, and therefore would face a bottleneck when the thickness reduction is required. The ALD technique could not only provide conformal step coverage on both trench and via, it could also allow reasonable thickness control for thickness in the order of 10Å. The integration results show that ALD TaN has promising electrical performance on sheet resistance, via resistance, and line-to-line leakage, and it also has superior reliability performance on electromigration, stress induced voiding and bias temperature stress (BTS) test as compared with conventional PVD TaN. Study doped-Cu to form a low-resistivity barrier to improve the interconnection performance. The Cu-Mg alloy is used as a seed layer for subsequent Cu plating in this study. Magnesium is an alkaline earth metal that readily reacts with oxygen, fluorine, nitrogen, and carbon, which are typical constituents of dielectric films. This high reactivity suggests that magnesium will react at the interface or surface to form compound such as MgO or MgF (potentially altering adhesion properties). Cu, on the other hand, has inherently poor adhesion to dielectrics. It reacts only slowly with oxygen and does not form a self-limiting oxide. Alloying Cu with magnesium can thus provide a means of improving the adhesion between Cu and dielectrics. It had been demonstrated that Cu-Mg forms a self-formed barrier layer that hinder the Cu oxidation and diffusion. Challenge of using extreme low-k dielectrics in interconnects is the increase of k value after integration process, and this is typically attributed to plasma damage. In advance Furthermore, the via-hole process is one of the most important issues for multilevel Cu damascene interconnects as the dimension of via becomes smaller and smaller. To remove these residual contaminations such as Cu oxide and Cu fluoride on the Cu surface, adequate pre-clean process is necessary before the barrier/seed deposition. To establish a new methodology of chemical analysis with Auger technique is helpful for precise chemical analysis in small feature size w/ manometer level. The results show Cu chemistry at the opening (via) bottom strongly influences subsequent barrier deposition and electromigration reliability. A model is proposed to explain that the electromigration strongly depends on Cu chemistry of the via bottom. Investigate the enlargement of trench width is found to be another major symptom of process damage, in addition to the increase of k value. The process damage is affected significantly by the clean processes before metallization. Establish a mechanism to explain both the damage of dielectric material and the enlargement of trench width. In addition, an enhanced cleaning process is developed to minimize both types of damage without the degradation of via cleanness. Robust electrical and reliability results are obtained for this low-damage which is applicable to extreme low-k dielectrics in interconnects of advanced generation for effective k reduction.

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