Abstract
Abstract Lead zirconate titanate Pb(Zr0.53,Ti0.47)O3 (PZT) is a promising ferroelectric material for VLSI circuit applications especially in ferroelectric random access memories (FRAM) and DRAM. Its large dielectric constant and rapid switching characteristics can meet the requirements for both storage devices. However, before PZT films can be fully utilized, its electric properties need to be better understood. MFIS structure have emerged as promising non-volatile memory devices. The superior characteristics of MFIS include a single-device structure, low power consumption and non-destructive read-out operation. In this thesis, metal/PZT/metal capacitors, metal/PZT/insulator/silicon capacitors and metal/PZT/insulator/silicon transistors were fabricated. The temperature dependence of the current conduction mechanisms in Au/PZT/Pt metal-insulator-metal (MIM) thin film capacitors was investigated. The dominant current conduction mechanism from 300K to 375K is space-charge-limited current (SCLC) due to holes and changes to Schottky emission in the temperature range of 400K-500K. The transition voltage (Vtr) of SCLC conduction and the trap-filled-limited voltage (VTFL) were measured. The deep trap level extracted from VTFL is positioned at 0.39 eV above the valance band edge. The Au/PZT barrier height extracted from Schottky emission is 0.85 eV. The electrical conduction currents through the MIM capacitors depend on the electrode material due to different work functions of the metal electrodes. The conduction current observed in Au/PZT/Pt is lower by about two orders of magnitude compared to that of Pt/PZT/Pt at low field (<0.4 MV/cm) due to the larger barrier height for holes of Au/PZT. The energy band diagrams of the Au/PZT/Pt and Pt/PZT/Pt structures are compared. Hole transport is used to explain the conduction mechanisms in these two capacitor structures. MFIS capacitors with PZT ferroelectric layer and HfO2, La2O3 and Dy2O3 insulator layers were fabricated. The purpose of the insulator layer is to prevent the reaction and inter-diffusion between the ferroelectric layer and silicon substrate as well to improve the retention properties. The size of the capacitance-voltage (C-V) memory windows was investigated. The temperature dependence of the current conduction mechanisms through the MFIS capacitors was also investigated. The oxide trapped charges in the ferroelectric/insulator layers are studied by a voltage stress method. The flatband voltage (VFB) is measured before and after the voltage stress. The energy band diagram of the MFIS structure at inversion and accumulation modes are plotted and the VFB shift can be explained by the trapping or de-trapping of charges. The result is consistent with the charge trapping model. Metal-Ferroelectric-insulator-semiconductor (MFIS) field effect transistors with PZT ferroelectric layer and lanthanide oxide Dy2O3 insulator layer were fabricated. The memory windows measured from C-V curves of MFIS capacitors and IDS-VGS curves of MFIS transistors are consistent. The non-volatile operation of MFIS transistors was demonstrated by applying positive/negative writing pulses. A high driving current of 9 mA/mm was obtained even for long channel devices with a channel length of 20 mm. The electron mobility is 181 cm2/V-s. The retention properties of MFIS transistors was also measured.