Abstract
Abstract During a past decade, the explosive increase on storage demand, including personal portable device and cloud technology, has spurred a kaleidoscope of investigation and development on solid state storage. The main-stream technology for fast and mass data storage nowadays, flash memory, has long-time occupied the leading position in the market. It, however, suffered a series of wide spectrums of scaling challenge, such as high voltage design, thin film reliability and process complexity. Scientists and industry are looking forward a universal solution as alternative for solid-state storage in the future. Resistive Random Access Memory, with the superior characteristic on writing speed, simplicity on structure and process, and highly compatible to CMOS process, seems like a promising savior in the future. In this dissertation, the Contact Random Access Memory (CRRAM) has been fully studied and characterized. The resistive switching behavior of CRRAM has been observed from 0.18m technology to advanced 28nm node in standard CMOS logic process. It shows the continuous scaling ability in both unit cell size and applied voltage, promising the CRRAM as a potential candidate in the field of embedded SOC application. Furthermore, ultra-high density CRRAM array can be realised by introduction of logic compatible vertical bipolar junction transistor (VBJT). With burying the NPN junction as conductive selector in the silicon substrate, single Contact RRAM (1C-RRAM) is demonstrated. Study of resistive switching phenomenon in the past few years reveals its widely application beyond memory. Including RRAM-base synapse to simulate and implement neuromorphic circuit and element-based logic operation. These areas are novel and attractive with infinity possibility in near future. Basing on the study and observation of CRRAM, this dissertation proposes two novel applications beyond conventional memory. Firstly, the share contact structure with properly input sequential signal to realise a non-volatile logic operation gate. Secondly, a novel true random number generator has been realised base on the strong random telegraph noise in CRRAM. In summary, CRRAM has several attractive advantage and superior cell performances including fully compatible with CMOS process and platform, ultra-small cell size, data retention and endurance. Its cell size can be further reduced by introduction of Vertical BJT as array selector. Finally, two unique inventions based on resistive switching behavior and strong noise in RRAM current are demonstrated. These shows the CRRAM could not only be a promising candidate for embedded memory, but also could implement as special circuit application.