Abstract
Looking beyond the 15 nm node ICs, the consensus is that not only high-κ dielectrics but also appropriate channel material should replace the long-standing SiO2/Si system. The combination of high-κ dielectrics with channel of the III-Vs will have to be integrated onto Si. The themes of this work were divided into three parts: 1. Silicon wafer and MBE-grown HfO2 thin template were used as substrates for sputtering deposition. From TEM pictures, the interfacial layer thickness of HfO2 deposited on Si and MBE-grown thin HfO2 template is 19.3 Å and 9 Å. At -1V, the leakage density is 3.8x10-3A/cm2 and 8.1x10-7A/cm2 for HfO2/Si and HfO2/(MBE-grown thin HfO2 template) samples. For HfO2/(MBE-grown thin HfO2 template) sample, a maximum value of capacitance at 1 kHz is 151pF, yielding a dielectric constant of 12.8 with the capacitance equivalent thickness (CET) of 17.8Å. The capacitance-voltage curves of HfO2/(MBE-grown thin HfO2 template) sample show a minor frequency dispersion of capacitance. The interfacial improvement and the enhanced electrical properties of the HfO2 film were obtained with MBE-grown thin HfO2 template. 2. HfO2 was combined with TiO2 to increase the dielectric constant. From TEM, the oxide thickness of Ti-doped HfO2 on Si and MBE-grown HfO2 template is 76 Å and 87 Å. The thickness of interfacial layer for Ti-doped HfO2 on Si and MBE-grown HfO2 template is 12Å and 8Å. At Vfb+1V, the leakage current density of Ti-doped HfO2 on Si and MBE-grown HfO2 template was 0.31 and 2x10-2 A/cm2. According to the CV curves, the calculated flat-band voltage of the Ti-doped HfO2 on Si and MBE-grown template was 0.15 and 0.28 volt. From the CV curves modified with two-frequency model, the calculated dielectric constant of Ti-doped HfO2 on Si and MBE-grown template is 13.4 and 21.4 with capacitance equivalent thickness of 22Å and 16 Å. 3. For the Al2O3/Ga2O3(Gd2O3)/In0.2Ga0.8As system, an atomically sharp oxide/semiconductor interface and amorphous GGO without any re-crystallization indicates the robustness and thermal stability of the hetero-structures. Both p- and n-MOS capacitors show very small frequency dispersion ranging from 2.2% to 4.4% (10 kHz–500 kHz) in the accumulation region, indicating the high-quality gate dielectric stack and GGO/In0.2Ga0.8As interface. For MOS capacitors with the same type of substrate and different metal gates, the differences between the Vfb’s are in good agreement with the differences in metal work functions, indicating unpinned Fermi-levels at the metal/dielectric interfaces. These are due to the perfected interfaces on both oxide/semiconductor and metal/oxide, revealing Fermi- level unpinning at both interfaces. Moreover, we have further derived the Vth’s of the p- and n-MOS capacitors with different metal gates. The present derived Vth values may not be very accurate, however, are in a good agreement with those observed on quasi-static C-V curves. In summary, the results in this dissertation demonstrate MBE-grown thin template is a good buffer layer to decrease the plasma bombardment during the sputtering process, mixing TiO2 into HfO2 is effectively to increase the dielectric constant value, and Vth’s of the p- and n-MOS capacitors with different metal gates was derived.