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Uniform Stabilizing Unison Systems
Dissertation

Uniform Stabilizing Unison Systems

Tzong-Jye Liu
Doctor of Philosophy (PHD), 國立清華大學, 資訊工程學系
1998

Abstract

分散式系統 容錯 自我穩定 同步 個體無差異環 步調一致系統 distributed systems fault-tolerance self-stabilization synchronization uniform rings unison systems
In this dissertation, we study the self-stabilizing unison protocols on uniform systems. A self-stabilizing system does not need any initialization; it guarantees that the system reaches some legitimate state after a finite number of steps. This makes a self-stabilizing system be able to cope with transient faults. Many distributed systems have to proceed in consecutive phases. In such systems, all processors must have their computation synchronized. Therefore, the unison problems are fundamental problems for the distributed systems. There are two types of unison systems: one is the synchronous unison system and the other is the asynchronous phase synchronization system. In this dissertation, we study these two kinds of systems on uniform rings. Three synchronous unison protocols and one asynchronous phase synchronization protocol are proposed. The first protocol is a binary clock protocol. In the binary clock protocol, each processor only requires two binary variables. This protocol improves the previous results on synchronous unison problems if the processor state is a major consideration. The second protocol is a 2^m-clock protocol, where m is any positive integer. This protocol can be applied on the applications in which each round has 2^m phases. Besides the variables for maintaining the clocks, in the 2^m-clock protocol, each processor only requires one additional bit. The third protocol is a randomized K-clock protocol, where K is any positive integer. The K-clock protocol breaks the symmetric actions by the random decision and the expected number of phases for the system to be synchronized is O(n^2), where n is the number of processors in the ring. The last protocol is an asynchronous phase synchronization protocol for uniform rings with odd size. This protocol guarantees that all phase values among all processors are never more than one apart when the system is synchronized.

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