Abstract
The reliability of computer is critical in many important applications, such as the computer system on an aircraft, the navigation system on a space ship, the accounting system in a bank, etc. To increase the reliability, it is important to detect fault immediately and replace the faulty modules to avoid crashing data. Conventionally, off-line testing is adopted, i.e., the computer system must be shut down before testing. However, it is not a feasible solution as digital system get more and more complex. Therefore, it is becoming highly desiable to let circuit have the capability of {\em self-checking} for repair and maintenance. Error detecting coding has been shown to be effective for this purpose. The conventional method is to define some inputs as valid inputs (called input codewords), and some outputs as valid outputs (called output codewords) so that the circuit can detect faults by observing whether the outputs are valid or not. The circuit and the code are designed such that under fault-free situation, an input codeword to the system will produce a correct output codeword, and if a fault (s/1 or s/0) occurs, the circuit will produce a non-code output for at least one code input. However the self-checking circuit output must be checked by a checker (called {\em Totally Self-Checking (TSC)} checker) which observing whether the output are valid or not. According to difference applications, many error detecting codes are proposed in pass years, such as $m$-out-of-$n$ code, Berger code, Borden code, Bose-Lin code, etc. In this dissertation, we propose some efficient design methods (using adder circuit) of TSC checkers for $m$-out-of-$n$ code,Berger code and Borden code,and give a strict and clear proof of the nonexistence of 1-out-of-3 code TSC checker at gate level.