Abstract
Device performance of metal oxide thin-film transistors (TFTs) has been improved by using bovine serum albumin (BSA) as the gate dielectric. BSA, a natural protein with good hydration ability, is composed of acidic and basic amino acid residues of 34% in total. The typical amorphous indium gallium zinc oxide (a-IGZO) TFT with SiNx as the gate dielectric exhibits a field-effect mobility (μFE) value of 12 cm2V-1s-1 and a threshold voltage (VTH) value of 0.25 V, which are comparable to the reported a-IGZO TFTs in the literature. In a relative humidity of 60%, the μFE value of a-IGZO TFT gated with BSA increases considerably to 113.5 cm2V-1s-1 and the VTH value reduces to 0.25 V. The large difference between device gated with SiNx and BSA can be attributed to the formation of electric double layers (EDLs) in hydrated BSA, which exhibits the same behavior as polyelectrolyte. The formation of EDLs contributes to large capacitance of hydrated BSA, which can accumulate higher carrier concentration to improve the performance of the a-IGZO TFTs and the μFE value is therefore increased. To date, n-type a-IGZO TFTs have been applied broadly to serve as the pixel-driving devices in the backplane of active-matrix organic light-emitting diode (AMOLED) displays and the liquid crystal displays (LCD). While p-type oxide TFTs are necessary for realizing the complementary metal oxide semiconductor inverters, it is urgent to develop p-type metal oxide semiconductor materials. We demonstrate good quality p-type copper oxide thin films can be deposited by radio-frequency (RF) magnetron reactive sputtering. The surface morphologies, compositions, crystallinities, and electrical characteristics have been extensively investigated by SEM, AFM, ESCA, XRD, and Hall effect for the purpose of fabricating the p-type copper oxide TFTs. The p-type cuprous oxide TFTs have been fabricated with different active layer thickness and post-annealing conditions. The device performance of p-type cuprous oxide TFTs gated with SiNx has been optimized with active layer thickness of 25 nm followed by annealing at 200℃ for an hour. We finally add an additional BSA layer on top of the device for serving the other gate dielectrics. It can be found that the device performance is improved and the μFE value increases. The p-type cuprous oxide TFT gated with BSA exhibits a μFE value of 0.102 cm2V-1s-1 and a subthreshold swing of 86.5 Vdecade-1.