Abstract
To improve the efficiency of packaging and increase the pin number for satisfying the higher performance and lightweight requirements of electronic products, solder joints, are often distributed in a ball-grid array area type between the package and printed circuit board (PCB). Due to the mismatch of thermal expansion coefficients among the components of electronic package and PCB, solder joints may endure significant thermal strain and stress, which will lead to a low cycle fatigue failures. When investigating the reliability of solder joints in an area array typed package, accelerated temperature cycling (ATC) test is a typical test condition as indicated in the JEDEC (Joint Electron Device Engineering Council) Test method A105-B standard. Because a large-scale area array typed package consists of several complex components, the finite element method is adopted as a common numerical method in addition to experimental tests. To compute accurate thermal strain/stress of solder joints, the finite element model constructed usually needs huge number of elements and nodes, especially, when the package contains significant number of solder joints. In addition, the nonlinear material properties of plasticity and creep of solder joints need be taken into account in the analysis. This further increases the computational time and makes the analysis more difficult. This study proposes a simple and effective global/local finite element approach for characterizing the thermal stress/strain of solder joints in an area array typed package under an ATC test, and eventually estimating their reliability. Since the global analysis is merely to identify the most suspicious solder joint for providing satisfactory displacements as external boundary conditions for the detailed local analysis, a simplified constitutive modeling strategy - Dwell Creep（DC）model is sufficient for establishing the compact global finite element model. However, a detailed local finite element model needs be constructed for analyzing the most suspicious solder joint subjected to the corresponding displacements computed from the global analysis. To evaluate accurate thermal strain/stress in the local analysis, a full constitutive modeling strategy comprising the elastic, plastic and creep responses is performed. To demonstrate the accuracy and effectiveness of the proposed approach, this study first adopts an area array typed package containing 72 solder joints as a test vehicle in case studies. The accuracy of the solutions computed from the proposed approach is demonstrated by comparing with a benchmark, which employs a conventional 3-D direct finite element analysis approach and fine-meshed finite element model and the full constitutive modeling strategy. In addition, the effects of constitutive modeling strategies in the global analysis are also extensively explored. The results show that the proposed approach can yield a satisfactorily accurate solution even it is associated with the most simplified constitutive modeling strategy, DC model. The computational time of the proposed approach is about fiftieth of the direct finite element approach. Furthermore, this study also estimates the fatigue life of solder joint. As compared with existing experimental fatigue life data, the proposed approach yields satisfactory results. The proposed approach then successfully applies to the investigation of solder joints reliability of the two single-chip area array typed packages that contain 225 and 256 solder joints and a stacked multichip area array typed package containing 48 solder joints. This study also validates the compact global finite element model for the area array typed package containing 256 solder joints by comparing with the moiré interferometric measurement of the in-plane displacement field. Finally, the proposed approach combining with the response surface method is adopted to estimate the influence of design parameters on the reliability of solder joints in a stacked multichip area array typed package. These design parameters include material properties of the substrate, the molding compound and silver adhesive and the size of chips. By the F-test, the adjusted coefficient of determination and the moiré interferometric measurement, the accuracy and applicability of these response surfaces are demonstrated. Based on these response surfaces, the influence on the solder joint reliability can be quickly and accurately estimated. These results would be quite helpful in the package design.