Abstract
In order to meet the needs of electronic products, various packaging techniques such as TSOP, BGA, Flip Chip, and WLCSP are actively being developed. However, it is rather difficult to quickly and effectively analyze each new design that shows up in the electronic packaging industry. Hence, this research would like to construct a packaging design criterion based on a review of packaging in the electronics industry.. In this research, two typical electronic packages, one of the leadframe type and one of the area array type are selected for review and study. They are the Thin-Small-Outline Packaging, TSOP and the Wafer-Level Chip-Scale Packaging, WLCSP. In order to determine the packaging effect of these two typical electronic packages, thermal characteristic and solder joint reliability are studied and compared. Furthermore, based on the review and investigations, two novel designs are proposed in this research. To figure out the difficulties of the electronic packaging design, both numerical simulation and experimental analysis are adopted. Non-linear three dimensional finite element models simulate the heat transfer path and stress-strain behavior of the electronic packaging. For verifying the finite element method analysis, two experimental methods are applied. The accelerated thermal cycling test is adopted to obtain the thermal fatigue life of the solder joint. At the same time, an optical measurement method, the Twyman-Green Interferometer, is applied to measure the real time out-of-plane displacement of WLCSP. The experimental results are compared with the simulation results to validate the methodology of the analysis in this research. In addition, a test chip concept was also proposed and manufactured to measure the local temperature and stress of a silicon chip in a WLCSP packaging. Furthermore, a prototype of the newly designed WLCSP proposed in this study was fabricated to clear up any possible manufacturing difficulties and to ensure its feasibility. The analysis results indicated that the lead-frame type packaging has good solder joint reliability but poor thermal characteristic on high dissipation power. However, the area array type packaging of WLCSP has different properties compared to the leadframe type packaging. Area array type packaging has good thermal characteristic and poor solder joint reliability. In order to overcome this problem, based on the discussions and the review in this research, a lead-frame type of Ceramic-TSOP and an area array type of Double-Pad-Structure WLCSP are proposed. After numerical simulation and analysis of the newly designed packages, the results show that the Ceramic-TSOP has excellent thermal dissipation characteristic and appropriate solder joint reliability. And, the double-pad-structure is found to be a feasible way to construct a compliant interconnection, as well as a good way for enhancing the solder joint reliability by means of a simple manufacturing process. Therefore, this research not only constructed a design criterion of electronic packaging but also proposed two novel designs to overcome some of the issues of electronic packaging.