Abstract
Flip chip packaging has become popular due to its high density, short possible leads, fast signal transmission, low inductance, excellent noise control, good heat dissipation. Probe-after-bump has been the primary procedure for the flip chip device over the past decades, owing to the fact that it does not directly contact the bump pad, and possesses a better UBM (Under Bump Metallurgy) step coverage. However, the probe-after-bump procedure delays the yield feedback to the fab, and makes it hard to specify the responsibility for the low yield of the bumped wafer between the foundry fab and the bumping house. The probe-before-bump procedure can solve these problems, but probe marks may cause poor UBM step coverage, since a rugged pad surface causes problems for the UBM sputtering process. The probe tip may penetrate the pad metal due to excessive overdrive. Initially, this work develops an analytic methodology for the probe-before-bump procedure to predict the probing depth, and describes feasible probing design parameters to avoid over probing of the bump pad. It then presents a finite element method, and a probing experiment is performed to verify the analytical methodology results. The verified analytical methodology is employed to ascertain an adequate probing parameter for the probe-before-bump procedure. Next, this work determines the thin film mechanical properties of the wafer by nanoindentation, to derive the probing depth from the analytical methodology. In addition, chip temperature and current density are the main factors which impact the electromigration behavior. Lower thermal resistance implies better anti-electromigration capability. Moreover, this work investigates the heat dissipation capacity of flip chip packaging with an aluminum or copper heat spreader, and a four-layered or six-layered substrate. Furthermore, the probe mark and underfill impact on flip chip eutectic solder bump electromigration were investigated, and then the design rule of solder bump electromigration based on ten years (87,600 hours) life is presented. Finally, this study examines the uncertainty of MTTF (mean time to failure) which is caused by the tolerance of current density and chip operation temperature. Results of this study are used to develop an analytic methodology to predict the probing depth, and to acquire an adequate probing parameter which is accurate, cost effective and efficient. In addition, this work thoroughly elucidates the negligibly impacts of the probing mark on the solder bump electromigration.