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新型雙向性穿隧三維快閃式記憶體元件之開發與研究
Dissertation

新型雙向性穿隧三維快閃式記憶體元件之開發與研究

楊青松
Doctor of Philosophy (PHD), 國立清華大學, 電機工程學系
1998

Abstract

快閃記憶體 穿隧編程 Flash FN tunneling
For recent Flash memory technology, both speed and power consumption are the most important issues. Particularly in the emerging telecommunication and portable systems, they request for high data transmission rate and long battery lifetime. For the conventional NOR-type array architecture, channel hot electron injection is used for fast programming speed, but consumes large power due to its high programming current. Another array architecture named NAND-type, with bi-directional FN tunneling program/erase, realizes low-power operation and page-mode (e.g. 2k bits) programming. However, lower read current due to the serial resistance limits the access speed, such that more complicated peripheral circuit is required to improve random access capability and read performance. In this study, a novel 3-D Flash memory, BiNOR, with localized P-well instead of conventional design is proposed to realize the operations facilitating low programming power and high read speed. Experimental results illustrate the superior programming characteristics and endurance characteristics (more than 105 cycles) of BiNOR Flash memory. Moreover, high read performance is also achieved by 15% conduction current enhancement due to 3-dimensional conduction effect. Therefore, BiNOR is the promising candidate for the high speed, low power and high reliability applications.

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