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玻璃基板上之非晶矽薄膜電晶體電路設計與實現於顯示系統之應用
Dissertation

玻璃基板上之非晶矽薄膜電晶體電路設計與實現於顯示系統之應用

鄭光廷
Doctor of Philosophy (PHD), 國立清華大學, 電子工程研究所
2016

Abstract

非晶矽薄膜電晶體 閘級驅動電路 內嵌式記憶體 a-Si TFT gate driver memory in pixel circuit
With current technology advancements, smart phones and tablet computers are fast becoming a viable alternative to PDAs and laptops, offering features such as mobile internet applications, multi-media functionality, and inbuilt GPS capabilities. The emergence of these products brings the progressive growing of display market. Therefore, display devices with narrow bezel, low power consumption, and high speed data capabilities are gaining the sale volume and popularity. For the narrow bezel demands of display devices, gate driver circuit using thin-film-transistor (TFT) has become a main stream for the liquid crystal display (LCD) due to the mature manufacturing, low-cost processing, and reducing of complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs). Furthermore, the design of memory-in-pixel (MIP) using TFT is as well as proposed to meet the low power consumption of mobile displays, which provided a low power standby mode for continuous display of static images. Nevertheless, design of TFT driver encounters two main challenges which are the lower field-effect mobility and the reliability issue under high voltage stress as compared with CMOS transistors. In order to alleviate the low mobility restriction, the larger width of the main driving TFT is required to drive the panel, however it accompanies with large parasitic effects inevitably. In addition, the reliability issue of the TFT drivers is as well as a notable challenge. While TFT suffers long term high voltage stress, the defect-state creation will cause threshold voltage shifts to decrease the life time of the driver. Consequently, these characteristics increase the design challenge of TFT driver circuits. The aforementioned design challenges of on-panel circuits for applications in display system form the motivation of this dissertation. The research topics of this dissertation including: (1) integrated gate driver with low power consumption in amorphous silicon (a-Si) technology, (2)single-stage-multi-outputs gate driver for narrow bezel panel application, (3)integrated gate driver with high reliability for medium and large size TFT-LCD or panel in car, (4)digital memory pixel circuit for panel with low power consumption . In chapter 2, the process of circuit design、measurement of device if a-Si thin film transistor、parameter extraction and model building. In chapter 3, a new integrated gate driver on array (GOA) has been successfully designed and fabricated by amorphous silicon (a-Si) technology for a 4.5-inch WVGA (800xRGBx480) TFT-LCD panel. The proposed circuit is designed with four clock signals to provide and copy outputs (single charging and discharging path) to gate driver. The layout area is reduced efficiently by this way compares to traditional gate driver which needs circuit blocks for pulling up and down. Moreover, dynamic power consumption is also reduced by small area for pull-down circuit block. Besides, bi-directional function is conducive to satisfy the demand of customers and function of screen rotation for smart panels. In chapter 4, a new gate driver is designed and integrated in panel for lowering the panel bezel from 1.2mm to 1.0mm. Number of outputs could increase to dual outputs or triple outputs per stage successfully using the noise circuit block sharing. Amount of TFTs for noise free block could be reduced efficiently and then the layout area is also be decreased. In chapter 5, two new type gate driver passed reliability tests for of the supporting foundry for 500 hours. Threshold voltage compensation block is added to maintain the performance of noise free by feedback degradation voltage to the a-Si TFT. Besides, the lifetime could be extended by modifying the clock signal to lower the duty cycle of key TFT. In chapter 6, two new digital pixel circuit memories are designed for low power consumption TFT-LCD. A-Si pixel memory is embedded in panel to provide voltage to liquid crystal in the standby mode. The power consumption for IC is decreased because of lowering the inputting frequency of data driver by this way. Besides, inversion signals could be produced by AC reference voltages and capacitor coupling to avoid the degradation of liquid crystal. Chapter 7 summarizes the main results of this dissertation. Some suggestions for the future works are also addressed in this chapter. In this dissertation, several novel designs have been proposed in the aforementioned research topics. Measured results of the integrated panels and fabricated test chips have demonstrated the performance improvement. The achievements of this dissertation have been published or submitted to several international journal and conference papers. Several innovative designs have been applied for patents.

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