Abstract
In this thesis, a FSK receiver operating at 1.2V supply voltage is designed. The receiver contains RF front-end (consisting of LNA and I/Q path mixers), complex channel selection lter, limiter, RSSI (received signal strength indicator), and FSK demodulator. To reduce power consumption, supply voltage is decreased from 1.8V to 1.2V. Some circuit techniques are used to operate under low supply voltage. Reference to Bluetooth R wireless system [1] which uses GFSK as its baseband modulation, the receiver uses Low-IF architecture to minimize the number of interconnecting blocks and total circuit area at the same time. Total requirement of the receiver is analyzed according to the test condition provided by the specication. The design goal is just the requirement. In the receiver, LNA and Mixer which comprise the RF front-end use conventional architecture due to the requirement is not very rigid. The channel selection lter is a 6th order Butterworth complex lter which provides the function of channel selection and image rejection. Besides, to alleviate the effect of process variation, a PLL-based auto-tuning technique is used. Behind thelter is a limiter which amplies the receiving signal and changes it to full swing digital signal. The limiter can also indicate the signal strength. This function is known as RSSI (Received Signal Strength Indication). At the stage of demodulation, a DLL-type FSK demodulation whose circuits are almost digital-like is used. Because most of the circuits are digital-like, it can operate under low voltage and consumes no DC current. Thus, power consumption is quite small. Circuit blocks mentioned above construct our receiver which has the characteristics of low power and small area. Last Revised: June, 2005