Abstract
This thesis can be divided into two parts: The first part is the design of high-speed multiplexer / de-multiplexer for optical communications. Nowadays, the optical communication systems are operating at a serial-data throughput up to 40 Gb/s. The communications integrated circuits operating at such a high speed were typically implemented using III-V devices, but with relatively higher cost compared with that CMOS technology. This work, based on CMOS technology, focuses on the high speed multiplexer/de-multiplexer in an optical transmitter/receiver. The proposed circuit uses the “parallel current re-use” technique, which is a modification of the “parallel current switching” technique. The customized 3D inductors are also used to reduce the chip area. According to the measurement results, this circuit can function in a range of 22-40 Gb/s, consuming 70 mW of power. The second part is the baseband circuit design and realization of a 77-79 GHz Ultra-wideband (UWB) multi-input multi-output (MIMO) radar. In this work, the coding mechanism is introduced to the transmitter and receiver of the MIMO radar. When the transmitter has transmitted a set of encoded signals, only one channel of the receiver can have good correlation output, the output of other channels after correlation is close to zero. According to the measurement results, we can find significant differences from the encoded signal and the continue wave signal using the spectrum analyzer. Also, we can see the different spread spectrum extension with different coding rate. By the loop-back measurements, transmitting the different code to the same channel of the receiver, we can observe only one type of code can match the channel of the receiver.