Abstract
In order to integrate power devices with planar IC process, the devices’ structure must be changed from the traditional vertical structure to lateral design, such that they can be integrated in the same chip. The main object of this thesis is to design a 700V LDMOSFET. The characteristic of the structure is to fill a PTOP in the drift region in order to decrease on-resistance and to produce better effect than traditional LDMOSFET. In this thesis, we integrate the PTOP and Pre-HVNW into 700V LDMOSFET to further improve the performance of RESURF LDMOSFET. Devices’ performance is compared under the base of the same size. Finally, we use computer simulation to obtain the detail of breakdown voltage and on-resistance under different situations. Careful tuning is made to obtain the optimum process conditions. The goal reached is that the device can sustain 700V breakdown voltage. The efficiency of the traditional device is indeed improved, and the results of the simulation also create the possibility of developing the complex structure in the future.