A 12bit 200MS/s Time-interleaved Hybrid-SAR ADC with Two-bit-per-cycle and Digital-slope Conversions

Thesis

Lih, Yu-Hsin

Masters, 國立清華大學, 電機工程學系所

2017

Abstract

類比數位轉換器

循序漸進逼近式

數位斜坡

ADC

SAR

Digital-slope

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Title: A 12bit 200MS/s Time-interleaved Hybrid-SAR ADC with Two-bit-per-cycle and Digital-slope Conversions
Translated title: A 12bit 200MS/s Time-interleaved Hybrid-SAR ADC with Two-bit-per-cycle and Digital-slope Conversions
Creators: Lih, Yu-Hsin
Contributors: Hsieh, Chih-Cheng (Advisor)
Awarding Institution: 國立清華大學, 電機工程學系所; Masters
Theses and Dissertations: Masters, 國立清華大學, 電機工程學系所
Language: English
Resource Type: Thesis
Date published: 2018