Abstract
The Multi-level technology has been essential for the modern or future flash memory. For NOR Flash memory, the sensing time and power consumption both dominate the performance of Multi-level sense amplifier. The approach of this thesis was designed to automatically adjust sensing current of reference cell to sense four levels and uses two stage open-loop comparator and one reference cell. This approach has less power consumption and less layout area than the current sensing of conventional method. Sensing time of this approach also achieves the target of NOR Flash memory for high speed application and is faster than the voltage sensing of conventional method. Besides, the sensing resolution can be lowered to 20mv and the minimum current difference is 2μA, which increases the read margin of Multi-level Flash memory. The proposed Multi-level sense amplifier was realized in TSMC 0.18μm CMOS process and the experimental results show that the power consumption per sense amplifier is only 1mW and the worst sensing time is 28ns.