Abstract
In this thesis, a variable gain RF front-end circuit is designed for 2.4-GHz ISM band applications. In order to reduce the chip area, a common-gate LNA with a resistor load is adopted to avoid any use of on-chip spiral inductors. Both loads of the LNA and mixer are digitally controllable so that there are totally 8 gain states. By setting the gain inverse proportional to RF input power, the output dynamic range of the RF front-end circuit is reduced. Therefore, the circuit linearity requirement is relaxed. To set the RF front-end gain appropriately, an automatic gain control (AGC) loop is integrated with the RF front-end circuit. It consists of a peak detector, a comparator and a digital control logic circuit. The amplitude level of IF signal is transformed to a DC voltage by the peak detector. This DC voltage is compared with a reference voltage to decide the gain setting. When the IF amplitude level is located at the desired range or the RF frontend gain is maximum or minimum, the AGC loop is disabled. Therefore, the noise performance of the RF front-end is not affected by the AGC loop. All designed circuits are realized in TSMC 0.18-μm mixed-mode CMOS technology and the chip area of the RF front-end with AGC is 1.0 × 1.0 mm2. According to the measurement results, the total gain range is around -4.1 ~ 14.62 dB with 2.7-dB gain step. The noise figure for the maximum gain setting is 8.79 dB. The P1dB for the minimum gain setting is -17 dBm. The total power consumption including the output buffer is 21 mW under a 1.8-V power supply.