Logo image
A Bit Loading Algorithm for Symmetric Rate DMT-Based Digital Subscriber Line Tranceivers
Thesis

A Bit Loading Algorithm for Symmetric Rate DMT-Based Digital Subscriber Line Tranceivers

Chia-Chi Hwang
Masters, 國立清華大學, 通訊工程研究所
2000

Abstract

位元載入 離散多載波 數位用戶迴路 回音消除器 對稱速率 bit loading Discrete Multitone Digital Subscriber Loop echo cancellation symmetric rate
This thesis proposes a new bit loading algorithm for echo cancelled duplex operation of DMT-based digital subscriber loop (DSL) modems that transmit equal data rates in upstream and downstream directions. This new algorithm uses the frequency bands in a very efficient way. The upstream and the downstream signals occupy the same frequency bands for the tones whose signal transmission channel gains are much higher than the echo channel gains. On the other hand, the upstream and the downstream signals are allocated to different frequency bands for the tones that have severe disturbance between two directions. The flexibility mentioned above makes the proposed algorithm suited to operate at different levels of echo cancellation. Hence, the proposed algorithm provides a trade-off between the transmission rate and the required echo return loss enhancement (ERLE) of echo cancellers. A number of computer simulations for the proposed algorithm and a previously described algorithm under different levels of echo cancellation are given. The simulation results demonstrate that the proposed algorithm can use the available power and frequency bands more efficiently than the previous one.

Metrics

1 Record Views

Details

Logo image