Abstract
We implement a JPEG2000 encoder based on an internally developed hardware/software codesign methodology. We emphasize on the concurrent execution of hardware accelerator IPs and software running on the CPU. In a programmable SOC platform, hardware acceleration of DWT and EBCOT Tier-1 sequentially gives us 70% reduction in total execution time. The proposed concurrent scheme achieves additional 14% saving. We describe our experience in bringing up such a system.