Abstract
This thesis presents a good power efficiency and high dynamic range (HDR) Readout IC with pulse width modulation (PWM) for infrared focal plane arrays (IRFPAs) and the fixed bias needed sensors. The fixed pattern noise (PFN) reduction has been implemented and the sensitive range tuning function is available. To achieve good power efficiency, the proposed capacitive trans-impedance amplifier (CTIA) with PWM readout circuit lower the operating voltage from 3.3V of conventional IR sensor to 1.5V. The operation of dual-exposure extended-counting (DEEC) exposure control overcome the limited exposure time issue of conventional PWM imager. Beside the dynamic range extension, fine image quality is also required. Hence, in order to implement the auto zeroing & offset cancellation (AZOC) mechanism, a coupling capacitance is added on the readout circuit to eliminate the FPN. Aligned time-control ramp (ATCR) generator is also developed and provides a tunable slope ramp threshold voltage for PWM readout operation which can achieve the sensitive range tuning function. A prototype of 64×64 pixel imager employed these schemes has been designed and fabricated in 0.18um 1P6M CMOS technology with a chip area of 1700×1800μm2, operating under 1.5V for analog and 0.8V for digital. The measurement result shows the proposed HDR ROIC achieves 132dB dynamic range, below 0.24%rms FPN performance, 230fps frame rate and resulting 1.27nW/frame ∙ pixel power efficiency.