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A High-Efficiency, Wide Load Range, Digitally-Controlled DC-DC Buck Converter with Asynchronous Power Saving Technique
Thesis

A High-Efficiency, Wide Load Range, Digitally-Controlled DC-DC Buck Converter with Asynchronous Power Saving Technique

Yang, Tsung-Ju
Masters, 國立清華大學, 電機工程學系
2010

Abstract

直流對直流降壓轉換器 非同步省電技術 可程式解析度控制器 類比數位轉換器 DC-DC buck converter Asynchronous Power Saving Technique Programmable Resolution Controller analog to digital converter
A wide-load, high-efficiency step-down converter with asynchronous power saving technique is presented in this paper. To meet the growing demand over the wide load range of interest, pulse-width modulation (PWM) and pulse frequency modulation (PFM) are two widespread control schemes in the switching converters. With the proposed asynchronous power saving technique, combined with the off-time modulation, the measured efficiency is kept at least 90% from 3 to 400 mA without embedded sensing circuitry. The DC-DC converter has been fabricated in a TSMC 0.18-umCMOS process and supplied with an input voltage from 2.7 to 3.6 V. The switching frequency is from 44 KHz to 1.65 MHz and the maximum output ripple is 40 mV with a 10-uF off-chip capacitor and a 2.2-uH off-chip inductor.

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