Abstract
We propose a generator for hardware acceleration of Discrete Wavelet Transform (DWT) with various coefficient parameters. Not only (5, 3) and (9, 7) DWT filters defined in the JPEG2000 image compression standard but also other filters, such as (9, 3), (6, 10) and (2, 2), can also be generated. The generated DWT IP can perform both forward and inverse transform (FDWT and IDWT). Our generator also provide on-chip-bus interface compliant with AMBA protocol and associated device driver so that the generated IPs are ready for SOC integration. We verify the proposed approach by integrating generated IPs into an SOC platform running JPEG2000 application software. Experimental results demonstrated that the proposed approach is indeed effective in enhancing the productivity of hardware accelerator IP design.