Abstract
In this thesis a 5 MHz, 10-bit resolution digital pulse width (DPWM) modulator is proposed. The 5 MHz switching frequency can effectively reduce filter size of switching-type DC-DC converter and decrease response time. 10-bit resolution is required in high accurate switching-type DC-DC converter to avoid limit cycle oscillation. A two-layer structure and dynamic reset scheme are proposed to decrease power consumption. The two-layer structure uses two different discharging current to generate desired delay. Dynamic reset scheme is reset system when output pulse-width has been generated. This scheme can reduce wasted power after output pulse-width has been generated. A digital calibration approach is proposed to remove filter used in charge pump scheme. A switching-type DC-DC converter is constructed to demonstrate the proposed DPWM can operate well when it integrated into the converter. A MATLAB simulation platform is designed to fast estimate the response of switching-type DC-DC converter. It shows the proposed DPWM can operate in 8 bit switching-type DC-DC converter without limit cycle oscillation.