Abstract
In recent years, non-volatile memory is popular and used in many applications. Among them, Flash memory is the mainstream of non-volatile memory, because it provides low-cost and high capacity storage. However, Flash memory demands high program/erase voltage and long program/erase time. Even worse, Flash memory faces many challenges in scaling technology, such as small cell current, large variation of threshold voltage and coupling noise. On the other hand, emerging non-volatile memory can alleviate those concerns, and has the potential to replace Flash memory in the next generation of mainstream non-volatile storage. CRRAM performs lower program voltage and fast program time with CMOS logic process compatible. These characteristics make CRRAM attractive to industry. Nevertheless, CRRAM suffers from small R-ratio and variation of resistance. Plus the variation of CMOS logic process, it is difficult to sense the memory cell correctly. In order to improve sensing speed and yield of a memory system, we propose a small offset sense amplifier with margin enhancement and threshold voltage compensated schemes. The offset suppression of the proposed sense amplifier is about 69% at 1V and 63.8% at 0.5V by our threshold voltage compensated scheme. The margin enhancement scheme can overall achieve 3.7 times enhanced efficiency. With these two schemes, the sensing speed under 4-Sigma is improved about 30% due to reduced BL developing time. As for yield, the proposed SA only require 20mV input difference to cover 4-Sigma variation. We implement our proposed SA into an nvTCAM macro fabricated in TSMC 65nm CMOS process. The measured read access time can achieve 1.2ns by our proposed SA.