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A Time Delay Multiple Integration Linear CMOS Image Sensor for Multispectral Satellite Telemetry
Thesis

A Time Delay Multiple Integration Linear CMOS Image Sensor for Multispectral Satellite Telemetry

Liu, Kuan Lin
Masters, 國立清華大學, 電機工程學系
2016

Abstract

時間延遲積分 互補式金氧半導體影像感測器 Time Delay Integration CMOS Image Sensor
This thesis presents a linear CMOS image sensor for multispectral (XS) satellite telemetry with time delay multiple integration (TDMI) technique to improve the signal-to-noise ratio (SNR) of imaging. To achieve high conversion gain, the capacitive trans-impedance amplifier (CTIA) based pixel with Y-to-Delta (Y-Δ) metal-oxide-metal (MOM) capacitor network as the integration capacitor is adopted in this work. With the proposed hybrid structure of analog and digital accumulation, the implemented time delay multiple integrator, cooperating with the adder and static random-access memory (SRAM) bank, integrates the functions of time delay integration (TDI), multiple sampling (MS), and analog-to-digital conversion in a single chip. By using two memory bank, the digital correlated double sampling (D-CDS) has also been implemented in this work. An 8-stage 128-column TDMI linear CMOS image sensor prototype was fabricated in 0.18-μm 1P6M standard CMOS technology with a chip area of 2500×5200 μm2. With an operation of 8 stages TDI and 64 times MS per TDI stage, the measurement result shows that the sensitivity is 40.42 V/lux∙s at a line time of 414.72 μs, the resulting SNR improvement is 9.37 dB, and operating at 1.8 V supply voltage, the power consumption is 17.77 mW.

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