A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage

Thesis

Huang, Hung-Jen

Masters, 國立清華大學, 電機工程學系所

2016

Abstract

非二進位低密度同位檢查碼

訊息壓縮

交織最小最大值演算法

nonbinary low-density parity-check codes

message compression

trellis min–max algorithm

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Title: A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
Translated title: A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
Creators: Huang, Hung-Jen
Contributors: Ueng,Yeong-Luh (Advisor)
Awarding Institution: 國立清華大學, 電機工程學系所; Masters
Theses and Dissertations: Masters, 國立清華大學, 電機工程學系所
Language: English
Resource Type: Thesis
Date published: 2017