A Two-Level Error Detection and Correction Scheme for 3D DRAM

Thesis

Lee, Kun-Nin

Masters, 國立清華大學, 電機工程學系

2014

Abstract

兩層式錯誤更正碼

蕭碼

三維動態隨機存取記憶體

寬輸入輸出動態隨機存取記憶體

Two-Level Error Detection and Correction (EDAC)

Hsiao code

3D DRAM

Wide-I/O DRAM

因申請專利緣故，資料延後公開

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Title: A Two-Level Error Detection and Correction Scheme for 3D DRAM
Translated title: A Two-Level Error Detection and Correction Scheme for 3D DRAM
Creators: Lee, Kun-Nin
Contributors: Wu, Cheng-Wen (Advisor)
Awarding Institution: 國立清華大學, 電機工程學系; Masters
Theses and Dissertations: Masters, 國立清華大學, 電機工程學系
Language: English
Resource Type: Thesis
Date published: 2015