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A Variable-Length FFT Processor For MIMO OFDM Systems
Thesis

A Variable-Length FFT Processor For MIMO OFDM Systems

洪建彰
Masters, 國立清華大學, 產業研發碩士積體電路設計專班
2008

Abstract

多重輸入輸出 正交分頻多工 快速傅立葉轉換
In this paper, we present a variable-length 256-point to 2048-point FFT processor for 4x4 Multiple Input Multiple Output(MIMO) Orthogonal Frequency Division Multiplex- ing(OFDM) systems. In general, the amount the FFT processors for MIMO system are dependent on the maximum required of data sequences and the basic unit butterfly has the 1/r idle time where r is radix-r. It is area-ineffective for VLSI implement. By the proposed butterfly sharing technique, the effective hardware utilization can be improved to 100%. The radix-42 algorithm is sufficient to deal with the four data sequences simul- taneous and reduce the hardware complexity and cost. The signal quantization noise ratio(SQNR) is over 43 dB for QPSK and 16/64-QAM signals. Moreover we imple- ment the variable length FFT processor in UMC 90um technology. The core area is 3.193248mm2 with 83.3MHz.

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