Abstract
Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis and optimization of logic designs and physical designs. It finds alternative wires to replace a given target wire without changing the functionality of the circuit. Previous approaches apply two-stage algorithms for this problem. First, building up a set of candidate wires for the target wire. Second, determining if a candidate wire is an alternative wire by redundancy test. Recently, a one-stage algorithm RAMFIRE [1] is proposed. It conducts three implications to identify backward alternative wires without trial-and-error redundancy test. However, the number of alternative wires it can find is smaller as compared with that obtained by the previous two-stage approaches. In this paper, we propose an improved one-stage algorithm, which only conducts two implications. Furthermore, both forward and backward alternative wires are obtained by our approach. The experimental results show that as compared with RAMFIRE for backward alternative wires, our approach only requires 83% cpu time on average, while obtaining the same number of alternative wires. As extending to both backward and forward alternative wires, our approach gets 157% improvement with 32% cpu time overhead on average.