Abstract
This thesis describes an ultra-low voltage 0.5V PWM CMOS imager with threshold-variation-canceling (TVC) scheme and programmable current-controlled threshold (PCCT) scheme to achieve noise suppression and dynamic range extension. A prototype 64×40 pixel imager employed these schemes experimentally achieve 82dB dynamic range, 0.055%rms fixed-pattern-noise (FPN), and random noise of 0.65 LSBrms, while consuming 147.3 pW/frame∙pixel at 78.5 fps, making it one of the most power-efficient wide-dynamic-range imagers. The imager implements pixels and their associated 10b column parallel ramp ADCs, enabling a pixel pitch of 10μm with 25.4% fill factor in a 0.18μm CMOS process. The innovations are contributed by this thesis, leading to the performance outlined above. First, a novel 3T in-pixel comparator with TVC scheme in two phase operations is biased in different current value. The difference of voltage from pixel reset and exposure transforms to a transistor threshold independent pulse width, eliminating the offset FPN from MOSFET threshold variation and improves the uniformity of imager at low voltage operation. Second, a novel adjusting method for giving the threshold of single-ended inverter-based comparator is proposed as PCCT scheme, which easily implements the dynamic-range-extension method of PWM with functional threshold of comparator with low supply voltage. Third, a power saving scheme used in pixel circuit for auto controlling the function of in-pixel comparator, avoiding the consumption of unnecessary power from completed comparator as pulse width occurred. Together, these innovations result in power-efficient wide-dynamic-range CMOS imager, which is suitable for using in biomedical environment as portable, implantable, or even disposable applications.