Abstract
Caesium clocks is developed for providing a time standard. For operating a Caesium clocks, a microwave source with the frequency very close to the atom transition is crucial. For Caesium atoms, it's transition frequency is 9192631770Hz. In this thesis, we study a PLL circuit of the microwave source for the Caesium clocks. We use a PLL circuit designed by NIST (National Institute Standards technology) and a function generator (model DS345) produced by Stanford Research Company to apply the reference signal. The PLL circuit can provide a stable frequency range about 10.69MHz to 10.710600MHz, then we will choose 10.701765MHz for the PLL output. This signal will be mixed with a signal of 500MHz to get a signal with frequency of 510.701765MHz, which is then input to a SRD ( Step Recovery Diode ) to generate the eighteenth harmonic, which is equal to the transition frequency of the Caesium atoms. For further understanding of this PLL circuit, some theoretical calculations are performed and a spectral analyzer is used to study the situations when PLL is in the locked or unlocked state. At last, phase noise measurements are performed (PN9000) to characterize the phase noise in this circuit.