Abstract
In this thesis, we propose low thermal budget laser technologies to fabricate high-performance 3D stackable poly-Si FET, including green nanosecond laser used to produce high-quality poly-Si channel, far infrared ray laser used to anneal source / drain regions after ion implantation and form the metal silicide layer on the source / drain, thereby improves the device performance. Green nanosecond laser is employed to transform the channel layer of the device from a-Si to poly-Si thin film. After chemical mechanical polishing (CMP) process, the average grain size is larger than 700nm, and the mean surface roughness can be lowered efficiently; moreover, the nc-Si on the surface can be polished. Far infrared ray (FIR) laser is utilized to anneal the source / drain regions. Silicon films with various doping species are activated by FIR laser after the substrate temperature is raised to 400oC, and the sheet resistances of sub-100Ω/□ for both B/P-doped Si and 100~200Ω/□ for As-doped Si can be realized. It significantly outperforms rapid thermal anneal (RTA) process and obsesses lower thermal budget. In addition, the dopant profiles of boron and phosphorus observed by SIMS analysis are less diffused than the data prepared by RTA process. Finally, we produce NiSi layer by two-step annealing processes, involving RTA (250oC, 30s) for the first step and FIR laser at low temperature for the second step. After that, NiSi layer which has low resistivity is formed on the surface and is used to lower the contact resistance. Silicide made from these ways has lower thermal budget and it can obtain equivalent resistance in comparison with two-step RTA processes. We integrate the technologies mentioned above to the poly-Si FET, and the highest drive current can be reached to 285A/m for n-type and 111A/m for p-type respectively. The effect of different device sizes on the electrical characteristics will also be discussed in this thesis. The poly-Si FET fabricated from these methods not only has better electrical properties but also has lower thermal budget, thus it is beneficial to develop 3D sequential layered devices.