Abstract
Multilevel coding (MLC) is a well-known coded modulation scheme proposed to achieve both power and bandwidth eciency. Multistage decoding (MSD) and parallel independent (PID) decoding are two decoding methods proposed for the MLC scheme. Since PID is a suboptimal but more e ective decoding strategy than MSD, we consider the MLC/PID scheme here. Any codes, e.g., block codes, convolutional codes, or concatenated codes, can be used as the component codes in the MLC scheme. In this thesis, we use the quasi-cyclic low-density parity-check (QC-LDPC) codes as the component codes. The construction of these codes is based on decomposition of circulants constructed from the Euclidean geometry. The encoding and decoding of the MLC scheme can be simpli ed based on the structural relations between the parity-check matrices of component codes. Therefore, we can greatly reduce the hardware complexity of the proposed MLC/PID scheme. Finally, we compare the simulated performance of the proposed MLC schemes employing QC-LDPC codes with those using other block codes and show the e ect of the signal mapping rule on performance.