Abstract
We will study the area and delay comparisons for hierarchical and mixed FPGA structure. In area evaluation, we shows that mixed FPGA is only 0.08\% smaller than hierarchical FPGA. In delay evaluation, hierarchical FPGA has a better critical path delay. The critical path of mixed FPGA passes through nearly 2 times more switch number than that of hierarchical FPGA. We also study the PLA cell granularity for area and delay for data path circuit implementation. It shows that 3-input 2-product term PLA cell results in the smallest area, and 4-input 2-product term PLA cell is the best choice in terms of delay. As to the comparisons of PLA and LUT cell structure, PLA cell leads to better results than LUT cell in both area and delay.