Abstract
The cost of mask set has increased significantly in deep sub-micron era. To reduce the mask cost, a new technology called structural ASIC has been very popular in today’s various technologies. In this thesis, we exploit a new design style called Transistor-Array-Based Programmable Cell Array (TAPCA) design style, which utilizes transistors arranged in array-like style to implement various cells for a cell library. Besides, it uses only five mask layers for a VLSI design. In other words, only five sets of masks are needed to manufacture a chip so as to reduce the mask cost and to improve the turn around time. Because the manual design of library cells can be very time consuming and error prone, in this thesis, we developed several CAD tools to perform automatic cell function generation and layout generators for the TAPCA design style. We have shown that our cell library generator can efficiently create a cell library for a given TAPCA style.