Abstract
我們簡介了邊緣掃描標準與邊緣掃描描述語言，討論了目前一些加入邊緣 掃描電路的方法。我們發展了一電腦輔助設計軟體(邊緣掃描與內含自我 測試電路自動產生器)來自動產生邊緣掃描電路。藉由友善的圖形使用介 面，使用者可以交談式的使用該軟體，而並不需要很清楚的知道邊緣掃描 標準。此軟體實現了邊緣掃描標準所定義的必需指令與結構，且包含了一 些選擇性的指令。此工具在合成邊緣掃描邏輯電路以後，還提供了一模擬 環境讓使用者驗証功能是否正確。設計流程可以重覆執行直到結果達到使 用者的目標。此工具同時也能自動地產生邊緣掃描描述語言檔案。我們藉 由軟體模擬的結果來比較多輸入轉移暫存器與模加簽名分析器的別名機率 與錯誤含蓋率，模擬結果顯示多輸入轉移暫存器的錯誤含蓋率高於模加簽 名分析器，我們提出一修改過的模加簽名分析器且結果顯示與多輸入轉移 暫器的錯誤含蓋率極為接近，但是若用馬可夫鏈程序技術來模擬卻顯示修 改過的模加簽名分析器的別名機率會依錯誤向量的位元錯誤率而變。這是 因為它的轉移矩陣不是 doubly stochastic ，這結果顯示模加簽名分析 器對於某方面的應用可能是一個好的簽名分析器，關於此點仍在研究當中 。依據模擬結果，我們採用線性反饋轉移暫存器為基礎的內含自我測試電 路在邊緣掃描與內含自我測試電路自動產生器中提供使用者一種可選擇性 的架構。 In this thesis, we review IEEE Boundary Scan (BS) Std. 1149.1-1990 and Boundary Scan Description Lan- guage (BSDL), and discuss boundary scan generation methodology. We develop a CAD tool (BS-BIST generator) to automatically generate the boundary scan circuitry. The user needs not know the standard in detail. By use of the friendly graphical user interface, he can execute it interactively. The tool implements the mandatory BS instructions and architecture and some optional instructions defined in the standard. After synthesizing the boundary scan logic, the tool support a simulation environment to let the user verify the functions. The design flow can be executed iteratively until the result satisfies his goals. The tool can also generate the BSDL file automatically. We also compare the aliasing probability and fault coverage of Multiple Input Shift Register (MISR) and Modular Addition Signature Analyzer (MASA) by software simulation. The simulation data show that MISR is better than MASA. We propose a modified MASA which is shown to have a better fault coverage than MISR. However, by Markov chain process technique modified version is shown to have aliasing probability dependent on the bit error rate of the error vector because its transition matrix is not doubly stochastic. This indicates that MASA is a good signature analyzer for a certain class of application which is still under investigation. According to the simulation results, we adopt the Linear Feedback Shift Register (LFSR) based Build-In Self-Test (BIST) in BS-BIST generator which is implemented as an optional structure.