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Burn-in Cost Reduction Using the Heat Produced by Applying Test Patterns
Thesis

Burn-in Cost Reduction Using the Heat Produced by Applying Test Patterns

Wei-Ting Wang
Masters, 國立清華大學, 電機工程學系
2007

Abstract

預燒測試 成本降低 測試圖樣 Burn-in test cost reduction test patterns
In IC manufacturing, burn-in test (a kind of accelerated test) played an important part in early-life latent failures detecting. It ensures high quality and reliability of manufactured ICs before shipping them to customers. Typically, the tester needs to provide the high temperature and high voltage for burn-in test. However, the high test cost (the chamber heater power consumption) during burn-in test is a huge expense for IC manufacturer. This paper presents a methodology for burn-in test power reduction which based on the use of a built in temperature sensor for detecting the real chip temperature when chips on the burn-in board are heated in the burn-in room (i.e. chamber). Both the heat produced by applying test patterns and the heat given by the heater in the chamber are considered. The temperature control of the chip in the chamber is more accurately and the power consumption of the heater is more economical than the conventional burn-in process. The fuzzy temperature control method is used to control the chamber temperature by calculating the heat generated by applying test patterns and that given by the chamber heater.

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